Chip design for submicron vlsi: cmos layout and simulation
yzd,1/nr. c.01
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| Format: | Sirkulasi |
| Language: | Inggris |
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Cengage Learning
2006
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uinsukalib-0875862014-01-13Chip design for submicron vlsi: cmos layout and simulationJohn P. UyemuraTEKNIK ELEKTRONIKAyzd,1/nr. c.01Cengage Learning2006Sirkulasi411; 24ISBN:978-0-534-46629-9Inggris |
| institution |
Universitas Islam Negeri Sunan Kalijaga |
| collection |
Perpustakaan Yogyakarta |
| language |
Inggris |
| topic |
TEKNIK ELEKTRONIKA |
| spellingShingle |
TEKNIK ELEKTRONIKA John P. Uyemura Chip design for submicron vlsi: cmos layout and simulation |
| description |
yzd,1/nr. c.01 |
| format |
Sirkulasi |
| author |
John P. Uyemura |
| author_facet |
John P. Uyemura |
| author_sort |
John P. Uyemura |
| title |
Chip design for submicron vlsi: cmos layout and simulation |
| title_short |
Chip design for submicron vlsi: cmos layout and simulation |
| title_full |
Chip design for submicron vlsi: cmos layout and simulation |
| title_fullStr |
Chip design for submicron vlsi: cmos layout and simulation |
| title_full_unstemmed |
Chip design for submicron vlsi: cmos layout and simulation |
| title_sort |
chip design for submicron vlsi: cmos layout and simulation |
| physical |
411; 24 |
| publisher |
Cengage Learning |
| publishDate |
2006 |
| isbn |
ISBN:978-0-534-46629-9 |
| _version_ |
1741229272326995968 |